Kursus: IAS0600 Digital Systems Design with VHDL (2022), Jaotis: Week 3. Introduction to FPGA. Lab tutorial 2 | Moodle

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    • Hello everyone!

      Welcome to the Digital Systems Design with VHDL course. Nowadays digital systems are everywhere. There are more electronic components in modern cars than mechanical parts. You might already know how to design digital systems using schematic diagrams, but in this course, we will learn how to create them using hardware description language such as VHDL. Digital circuits created during the practical classes will be implemented on FPGAs. FPGAs (Field Programmable Gate Arrays) are an example of reconfigurable computing systems that are gaining more and more popularity these days.


    • URL ikoon
      Course info (link to study information system) URL
    • Fail ikoon
      Extended syllabus Fail
    • Lehekülg ikoon
      Course schedule Lehekülg

      The detailed schedule of the course with topics covered during the lectures and corresponding labs.

    • Grading system

      Total points = Lab points + Exam + Bonus points = 60 + 40 + 10

    • Recommended reading

      • Volnei A. Pedroni, Circuit Design and Simulation with VHDL, The MIT Press, 2010.
      • Sarah L. Harris & David M. Harris, Digital Design and Computer Architecture, Elsevier, 2016.
    • Foorum ikoon
      Course participant's forum (ask questions from a teacher/other participants) Foorum
    • Foorum ikoon
      News forum Foorum
Week 2. Introduction to VHDL. Lab tutorial 1
Weeks 4 & 5. Dataflow modeling style. Lab 1

Week 3. Introduction to FPGA. Lab tutorial 2

  • Week 3. Introduction to FPGA. Lab tutorial 2

    • During the lecture, we will talk about reconfigurable computing and FPGA as an example of reconfigurable hardware. The link below points to the Xilinx webpage dedicated to numerous FPGA applications.

      During the practice, we will do the second lab tutorial. It will show how to automate the output verification during the simulation and how to synthesize the created design and implement it on the FPGA board. Save files from the folder below to the lab computer, we will need them for the tutorial.

    • Kaust ikoon
      Source files for lab tutorial 2 Kaust
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      Introduction to FPGA Fail
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      Lab tutorial 2 Fail
    • URL ikoon
      FPGA Applications (Xilinx) URL
Week 2. Introduction to VHDL. Lab tutorial 1
Weeks 4 & 5. Dataflow modeling style. Lab 1